1. Field of the Invention
The present invention relates to an information processing apparatus which receives commands issued by a command initiator (for example, a CPU; Central Processing Unit) and executes the received commands.
2. Description of the Related Art
There are conventional information processing apparatuses (hereinafter will be called the first information processing apparatus) including a receiving unit, which receives commands issued by a command initiator (for example, a CPU), and an executing unit, which executes commands which are received by the receiving unit. In this first information processing apparatus, a command received by the receiving unit is directly received by the executing unit, and command execution is controlled so that the command initiator does not detect a time-out of a command, by recording a receiving time at which the command is received.
However, in the first information processing apparatus, if the receiving unit receives a command while the executing unit is executing another command, the executing unit temporarily halts the current command execution to receive the newly received command received by the receiving unit. Thus, if the receiving unit receives commands consecutively, it becomes difficult for the executing unit to complete the command processing currently being executed, and as a result, a time-out of the subject command which is under execution can be detected.
In particular, even when the subject command which is being executed by the executing unit is a command to be executed with higher priority than other commands, the executing unit must spend time in receiving other commands which need not be executed immediately. In this manner, halting the processing of the subject command which is to be executed with priority seriously impedes performance of a system which is limited in processing time.
Therefore, there have been developed information processing apparatuses (hereinafter will be called the second information processing apparatus) having a buffer of a First In First Out (FIFO) type interposed between the receiving unit and the executing unit, which buffer temporarily stores therein commands received by the receiving unit. The executing unit takes out (reads/reads out) the buffered commands with timing which does not affect command execution performed by the executing unit.
The following patent document 1 discloses an art of buffering commands in a FIFO-type buffer.
However, in the second information processing apparatus, since it is impossible to measure a time during which commands are temporarily stored in the buffer, monitoring of command time-out cannot be accurately performed.
That is, since the time during which commands are stored in the buffer cannot be measured, the following events can happen. As the time-out of a command taken out of the buffer by the executing unit is so close that the executing unit cannot afford the time to process the command, a time-out is detected. In addition, with a command being stored in the buffer (that is, before the executing unit takes out the command), a time-out can also be detected.
Further, in the second information processing apparatus, commands received by the receiving unit are temporarily stored in the buffer. Thus, if a command which is to be executed with higher priority than the other commands is received, the priority command is still temporarily stored in the buffer. As a result, the executing unit cannot recognize the issuance of the priority command until the command is taken out of the buffer.
Accordingly, in the second information processing apparatus, a priority command, which is to be executed with higher priority than the other commands, will not be executed until the executing unit takes out the priority command. In consequence, the apparatus is disadvantaged in that it cannot properly cope with commands to be executed with higher priority than other commands.
[Patent Document 1] Japanese Patent Application Laid-Open NO. HEI 6-286271